The OpenRAM project aims to provide a free, open-source memory compiler development framework for Random-Access Memories (RAMs). It is a joint development project between University of California Santa Cruz and Oklahoma State University to enable memory and computer system research by creating an open-source compiler infrastructure.
Please see our official distribution at:
https://vlsida.github.io/OpenRAM/
or clone a copy with:
git clone https://github.com/VLSIDA/OpenRAM.git
If you would like to cite OpenRAM, please use the following ICCAD paper:
M. R. Guthaus, J. E. Stine, S. Ataei, B. Chen, B. Wu, M. Sarwar, "OpenRAM: An Open-Source Memory Compiler," Proceedings of the 35th International Conference on Computer-Aided Design (ICCAD), 2016
We have two Google groups for information:
openram-dev-group@ucsc.edu is for discussion of OpenRAM development. To subscribe, email openram-dev-group+subscribe@ucsc.edu.
openram-user-group@ucsc.edu is for release announcements, general usage of OpenRAM including setup or possible bugs. To subscribe, email openram-user-group+subscribe@ucsc.edu.
Here are a number of other papers that we have authored that have used OpenRAM directly or indirectly:
S. Ataei, J. Stine, M. Guthaus, “A 64 kb differential single-port 12T SRAM design with a bit-interleaving scheme for low-voltage operation in 32 nm SOI CMOS,” International Conference on Computer Design (ICCD), 2016, pp. 499-506.
E. Ebrahimi, M. Guthaus, J. Renau, “Timing Speculative SRAM”, IEEE In- ternational Symposium on Circuits and Systems (ISCAS), 2017
B. Wu, M. Guthaus, "Bottom Up Approach for High Speed SRAM Word-line Buffer Insertion Optimization'', IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2019
This material is based upon work supported by the National Science Foundation under Grant No. CNS-1205685 and CNS-1205493 and a gift from Google.